1. Field of the Invention
The present disclosure relates to a photolithography technology, and more particularly, to a mask and a method for fabricating the same.
2. Brief Description of Related Technology
With an increase in the degree of integration of a semiconductor device, a Critical Dimension (CD) of a circuit pattern becomes finer and finer. To transfer finer circuit pattern onto a wafer using photolithography technology, a mask pattern having a more exact CD must be fabricated. The mask used in the photolithography technology is fabricated so that a mask pattern is formed on a transparent quartz substrate, the mask pattern having a layout of a circuit pattern to be transferred to a wafer. The mask pattern is formed of a phase shift layer in order to improve the resolution. As the phase shift layer, a molybdenum (Mo) layer is generally used, and the molybdenum layer can contain silicon, oxygen, and nitrogen to form an alloy thereof.
A halftone phase shift mask, in which a mask pattern is formed of a phase shift layer, is fabricated by depositing and patterning a molybdenum phase shift layer and a chromium (Cr) light shielding layer on a transparent quartz substrate and then selectively removing a light shielding layer pattern disposed on the patterned phase shift layer. A selective dry etch process is used to pattern the mask pattern, includes a phase shift layer pattern, and a cleaning process is performed after this etch process to remove process byproducts or foreign substances present on a surface of the fabricated mask. Since the phase shift layer pattern or the mask pattern is patterned by a selective dry etch process, a size of CD thereof is determined in the dry etch process. Nevertheless, since the phase shift layer pattern is corroded or lost in the subsequent cleaning process, the CD size of the phase shift layer pattern can be varied by the cleaning process.
When the CD size of the phase shift layer pattern is varied from the target CD, the mask must be re-fabricated. In the case of a CD variation in which the CD size of the phase shift layer pattern becomes smaller than the target CD, an exposure defect and a wafer pattern defect are caused since the photoresist pattern realized on the wafer has a smaller CD than the required target CD. In the case of the CD variation in which the CD size of the phase shift layer becomes smaller than the target CD, it is very difficult to subsequently correct the CD of the phase shift layer pattern to be within a process tolerance of the target CD, and in some situations the fabricated mask may be unusable and may need to be discarded.
Even when the CD just after the dry etch process or patterning process for forming the phase shift layer pattern is measured to be within the process tolerance of the target CD, the phase shift layer pattern can be excessively corroded or lost during the subsequent cleaning process. As a size of the phase shift layer pattern becomes finer, there occurs a case that the CD variation due to the loss phenomenon is out of a process tolerance. Observation has been reported that this excessive corrosion can be generated when using a cleaning solution having relatively high detergency, and this becomes a factor that restricts realization of a desired cleaning effect in the subsequent cleaning process. Since the cleaning process is a process of removing from the surface of the mask the byproducts or foreign substances generated during the fabrication of the mask, foreign substances or particles can remain on the surface of the mask when a cleaning process is performed using a cleaning solution having relatively weak detergency. This can result in an exposure defect generating in an exposure process for the pattern transfer. Therefore, in order to control the CD size of the phase shift layer pattern so that it is within a process tolerance of the target CD, development of a method capable of preventing or limiting the CD variation of the phase shift layer pattern caused during the cleaning process is needed.